Staff Analog AI Compute Architect

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Staff Analog AI Compute Architect

Role Summary

We are building a pioneering organization focused on advancing the next generation of Edge AI compute and intelligent sensors. We are seeking a Staff level AI Compute Architect who will play a critical role in leading the architectural definition and early integration planning of disruptive µAI compute blocks (analog, neuromorphic, in-memory) into future ADI SoCs. You will benchmark and develop new state-of-the-art compute architectures for edge devices, translate advanced Edge AI functionality into analog, SNN, and heterogeneous compute designs, and implement detailed compute modeling in Python and SystemC to extract key performance indicators that guide architectural decisions. You will also support early RTL and analog prototyping of internal and third-party IPs,  and define robust IP interface specifications while working closely with analog and digital design teams to deliver industry-leading edge performance.

Key Responsibilities

• Act as a technical lead and a mentor in HW AI compute and heterogeneous architectures 
• Accountable for driving SOTA advanced AI compute research and recommend ADI’s next generation heterogeneous architecture
• Drive cross-organization research and lead benchmarking of new state-of-the-art compute architectures specifically designed for efficient Edge AI deployment.
• Translate advanced Edge AI intelligent functionality into µAI, analog, SNN, and heterogeneous compute architectures that deliver state-of-the-art performance on edge platforms.
• Develop and implement compute modeling frameworks in Python and SystemC to extract critical KPIs such as latency, power, throughput, and memory utilization.
• Support early RTL and analog prototyping of both internal and third-party IP blocks.
• Define detailed IP interface specifications (e.g., AXI, NoC, DMA, memory subsystems) to ensure seamless integration across analog and digital design domains.
• Coordinate closely with analog and digital design teams to validate architectural assumptions and interface requirements.
• Contribute to the technical roadmap for next-generation Edge AI compute solutions and provide architectural guidance across cross-functional teams.

Ideal Profile

• Master’s or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
• 10+ years of experience in hardware architecture design for compute-intensive applications, preferably in AI/ML or edge computing domains.
• Proven experience with compute modeling and performance analysis using Python and SystemC.
• Deep understanding of µAI architectures, heterogeneous compute, and system-level trade-offs for edge platforms.
• Hands-on experience in analog compute, in-memory compute, and neuromorphic architectures is a strong advantage.
• Strong knowledge of SoC design principles, including memory hierarchies, interconnects (AXI, NoC), DMA, and IP integration.
• Hands-on experience supporting RTL design, simulation, and prototyping flows, as well as analog-mixed signal blocks.
• Demonstrated ability to define and document clear IP interface specifications and coordinate with multi-disciplinary design teams.
• Excellent analytical and problem-solving skills, with a keen eye for balancing power, performance, and area constraints.
• Strong communication and collaboration skills, with a passion for building cutting-edge compute solutions in a fast-paced, innovative environment.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

The expected wage range for a new hire into this position is $166,800 to $229,350.

• Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

• This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

• This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.