Northrop Grumman’s Defense Systems is currently seeking a FPGA Digital Design Engineer 3 with the desire to learn new technologies to join our innovative Digital Technologies Organization to help develop, enhance, and maintain FPGA designs on cutting edge products and systems. As a Digital FPGA Engineer at Northrop Grumman, you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation. Through the use of Model-based Engineering, DevSecOps and Agile practices we continue to evolve how we deliver critical national defense products and capabilities for the warfighter. Our success is grounded in our ability to embrace change, move quickly and continuously drive innovation.
The selected individual will work on FPGA and ASIC Design across the full product life cycle process. In this capacity, you will utilize your working knowledge of digital signal processing and digital interfaces. This role will support the ARRGM-ER program within the Advanced Weapons Business Unit in Northridge, CA.
This position requires the selected candidate to work on-site in Northridge; CA on a 9/80 schedule. Telework is not available for this position. Relocation assistance, although not guaranteed, may be available.
Roles and Responsibilities:
Responsible for research, design, and development for complex high speed digital designs.
Support the implementation of digital FPGA hardware architecture and algorithms.
Collaborate with Systems Engineering to ensure firmware design meets system level requirements, review designs and analysis.
Basic Qualifications for FPGA Digital Design Engineer 3:
Bachelor’s degree in electrical engineering or other STEM discipline with 5 years of digital verification engineering experience using industry standard simulation tools; 3 years with an MS degree
Must have hands on FPGA design experience with VHDL and/or Verilog within the past 3 years.
Experience with AMD/Xilinx and/or Intel/Altera SoC FPGAs
Experience with Electronic Design Automation (EDA) Tools: Vivado, Quartus, and QuestaSim
Must have an active DoD Secret Clearance to start
Preferred Qualifications for FPGA Digital Design Engineer 3:
Experience with DSP, MATLAB, and SimuLink
Knowledgeable in FPGA physical constraints and achieving timing closure.
Experience with board or system level debug using test equipment such as oscilloscopes and logic analyzers.
Generation of Test Benches and support of formal VHDL Verification
Experience in high-speed FPGA implementation such as AXI, DMA, and Ethernet
Strong design skills in VHDL and/or Verilog
Experience in debugging FPGA applications using Altera signal tap or Xilinx ILA
Experience with PCB schematics
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