Job Details:
Job Description:
In this role, you will implement DFT methodologies to ensure our products meet the highest quality and testability standards.
Key Responsibilities:
- Integrate DFT blocks into functional IP and SoCs, providing support for high-quality integration across teams.
- Create and deliver manufacturing test content for DFx features, including SCAN, MBIST, and BSCAN.
Qualifications:
Minimum Qualifications:
- Bachelor's or Master's degree in Electronics Engineering, Microelectronics, or a related field.
- 0-1+ years of experience on basic DFT methodology.
- Proficiency in electronic design automation (EDA) tools such as Siemens Tessent and waveform viewers.
- Knowledge of scripting languages like Tcl, Perl, or Python.
- Strong understanding of digital design principles and DFT concepts, including JTAG, iJTAG, SCAN, MBIST, and BSCAN.
- Familiarity with VLSI design flows and methodologies.
Preferred Qualifications:
- Exposure to cutting-edge industry trends and innovative DFT approaches.
- Demonstrated ability to collaborate across multidisciplinary teams and environments.
Job Type:
Intel Contract Employee
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.