Semtech

Staff Verification Engineer

CHE - Neuchatel Full time

Location: Neuchâtel, Switzerland

 

Our Team:

Semtech’s Wireless and LoRa® system teams in Neuchâtel and Grenoble are global leaders in Low Power Wide Area Network (LPWAN) technology. Our engineers bring deep expertise across the full system stack — from RF and analog design through to digital IC development, protocols, and cloud-based solutions — enabling industry-leading, low-power, long-range wireless communication.


Working within this highly collaborative and innovative environment, you will contribute to the evolution of next-generation LoRa and LoRaWAN system architectures, supporting cutting-edge IoT solutions deployed worldwide.

 

Job Summary:

The Staff Verification Engineer is responsible for leading pre-silicon RTL verification at both block and SoC level for complex mixed-signal wireless ICs. This role involves defining and executing comprehensive verification strategies, ensuring design robustness through coverage-driven methodologies, and collaborating closely with design and architecture teams to deliver high-quality silicon.

The position requires strong technical expertise in modern verification techniques and a proactive approach to improving verification processes and methodologies.

 

Responsibilities:

• Define and implement test plans and verification strategies based on design specifications and requirements (10%)
• Develop assertion-based checkers and functional coverage models aligned to verification plans (20%)
• Perform functional verification of RTL designs using industry-standard methodologies (e.g. UVM) (20%)
• Generate and analyse coverage reports to ensure verification completeness and quality (20%)
• Collaborate with design and architecture teams to understand system requirements and ensure alignment (10%)
• Identify, debug, and resolve verification issues and design bugs (10%)
• Drive continuous improvement of verification processes, methodologies, and tools (10%)

 

Minimum Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• 8+ years of experience in SoC verification
• Strong hands-on experience with UVM-based verification methodologies
• Proven experience in defining and executing test and verification plans
• Experience with coverage-driven verification and coverage analysis
• Proficiency in SystemVerilog and assertion-based verification
• Familiarity with industry-standard verification tools (e.g. VCS, QuestaSim)
• Experience with IC design verification at block and SoC level
• Knowledge of formal verification techniques
• Experience verifying bus architectures (e.g. AMBA AHB/AXI, NoC, Bus Fabric) in UVM environments
• Understanding of low-power verification methodologies
• Strong analytical, debugging, and problem-solving skills
• Excellent communication and teamwork abilities

 

Desired Qualifications:

• Strong programming skills in Python
• Experience in wireless SoC design and verification
• Knowledge of scripting languages (e.g. Tcl, Python, Perl) for automation
• Familiarity with version control systems (e.g. Git)

 

Career Growth Philosophy:

At Semtech, we believe that innovation starts with people. We are committed to empowering professional development through mentorship, continuous learning resources, and a collaborative, idea-rich engineering environment.

 

Our pay-for-performance culture rewards initiative, encourages growth, and recognises meaningful technical and leadership contributions. Engineers in this role are supported to expand their influence, deepen their expertise, and shape both their career progression and the future of Semtech’s digital engineering capabilities.

 

Additional Notes:

The intent of this job description is to describe the major duties and responsibilities performed by incumbents of this job.

Incumbents may be required to perform job-related tasks other than those specifically included in this description.

 

All duties and responsibilities are essential job functions and requirements and are subject to possible modification to reasonably accommodate individuals with disabilities.