Job Details:
Job Description:
Intel is seeking a highly technical Senior Design Verification Engineer for the Silicon Chassis team. In this senior technical leadership role, you will design and deliver next-generation chassis IPs, designed to scale across multiple product families. You will establish verification strategy and methodology, drive technical development with deep expertise, and deliver first-pass silicon success through best-in-class IP design and verification practices. This role requires exceptional technical depth across advanced DV methodologies and tools, combined with strong expertise in interconnect protocols, cache coherency, memory architecture, and software integration. You will be a key technical authority, owning multiple high-impact IP blocks and setting standards for technical excellence.
Responsibilities
- Design, develop, and deliver a comprehensive verification strategy and methodology that scales seamlessly from IP through subsystems to SoC-level verification
- Design and implement advanced verification environments, tools, and testplans enabling first-pass silicon success; develop sophisticated testbenches, checkers, VIPs, and complex behavioral models
- Collaborate closely with architecture, design, and software teams from initial product definition and specification reviews through implementation, bringup, and productization phases; balance complexity and ensure timely, high-quality execution
- Drive ownership of multiple critical blocks and verification components; take full responsibility for functional signoffs and achievement of performance and power metrics
- Lead IP delivery to multiple customers while ensuring technical excellence; balance competing requirements, schedules, and resources across teams
- Champion innovation across simulation, formal, and accelerated verification methodologies; develop and evaluate new ML-based flows and hybrid software frameworks
- Mentor and develop verification engineers; establish verification best practices and drive organizational technical excellence
Qualifications:
Minimum Qualifications
- BS/MS in Electrical Engineering, Computer Science, or related field, with 12+ years of relevant experience in design verification; extensive background in IP DV with significant, demonstrated experience in subsystem and SoC-level verification
- Proven deep expertise in interconnects, caches, and memory subsystems, including multiple bus protocols such as AMBA (CHI, ACE, AXI), PCIe, UCIe, and CXL; cache coherency and memory consistency models
- Demonstrated experience in verification of global functions including debug, trace, clock and power management, RAS, QoS, and security features
- Strong background in simulation-based verification methodologies including UVM, ABV, and co-simulation; proficiency in low-power verification techniques, HDL/verification languages, and industry-standard EDA tools
- Advanced hands-on coding proficiency across SystemVerilog/UVM, software programming languages (C/C++), scripting (Python), and build systems; established track record of developing and delivering highly configurable and reusable verification collateral
- Excellent communication and organizational skills with a proven track record of delivering on-time, high-quality silicon and establishing technical standards
Preferred Qualifications
- Demonstrated experience with formal verification apps and emulation or FPGA based verification
- Prior work with system IPs such as MMUs (SMMU or IOMMU) and interrupt controllers, and working knowledge of the associate software stacks
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
Virtual India
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.
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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.