Principal Engineer, Mixed-Signal Design Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X).

          

Principal Engineer, Mixed-Signal Design Engineering

About the Role:

The ADI Industrial Architecture Team (Wilmington, MA) is seeking an experienced Principal Mixed-Signal Design Engineer with high speed, fine-line mixed-signal CMOS experience for the IC architecture development of breakthrough new products. The candidate will be a key member of an advanced architecture team and drive an industry-leading high-performance Industrial portfolio into new and more highly integrated market segments. The candidate will have the opportunity to develop system level designs on both monolithic and heterogeneously integrated systems using fine line CMOS and other process technologies collaborate closely with an experienced and motivated development team. A demonstrated track record of driving industry-leading performance and innovation, as manifested through patents, peer-reviewed publications and/or industry-leading product leadership, is required. The ideal candidate is a self-motivated individual and with strong technical, analytical and communication skills.

Key Responsibilities:

• Lead architect for clock generation and distribution in an advanced mixed-signal IC for pin electronic testing.
• PLL design, integration and debug
• Multi-GHz clock distribution
• Multi-chip synchronization
• Phase interpolators
• Circuits for measuring and correcting timing errors
• Assist in architecture development of a receive path which include subblock specifications which may include CTLE, PGA and A/D converter

Qualifications:

• PhD required.
• 5-10 years of experience in analog design and design integration.
• Analog/RF Designer experienced in CMOS IC design with multiple tapeouts.
• Good understanding of
  • Analog/RF circuits, and systems
  • Communication theory with a particular emphasis on equalization of a wired link.
  • MOS device modeling and operation
  • Signal integrity.
  • SerDes
• Extensive experience in PCB design, troubleshooting and RF measurements

Preferred Skills:

• Tapeouts in FinFET technology
• Strong problem-solving abilities and attention to detail.
• Ability to work collaboratively in a team environment.
• Proactive and self-motivated with a passion for innovation.

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Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

The expected wage range for a new hire into this position is $157,080 to $227,460.

• Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

• This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

• This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.