Director Field Applications Engineer

Job Description

Astera Labs is seeking a seasoned and accomplished Field Application Leader in Taiwan to lead and empower our team of Field Application Engineers (FAEs). You will be responsible for driving successful customer deployments, maximizing technical adoption of our connectivity products, and ensuring exceptional customer satisfaction within your assigned territory. 

Responsibilities 

• Manage and support assigned customer accounts, building strong relationships and acting as a trusted technical advisor. 

• Delegate tasks and projects effectively, ensuring timely completion and high quality. 

• Collaborate closely with sales and account management to understand customer needs and develop winning technical solutions. 

• Oversee successful product implementation and user adoption for assigned customers. 

• Proactively identify and address customer challenges, ensuring their satisfaction and building long-term partnerships. 

Basic Qualifications 

• Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field (Master's degree a plus). 

• Minimum of 15+ years of experience in a technical field application role, with at least 5 years of leadership experience. 

• Proven track record of successfully managing and developing a team of technical professionals. 

• Excellent communication, presentation, interpersonal, and leadership skills. 

• Ability to travel as required. 

Required Experience 

• Hands-on, thorough knowledge of high-speed protocols like PCIe & Ethernet 

• Silicon/System bring-up and debug experience in customer systems. 

• Experience with lab equipment including protocol analyzers and oscilloscopes. 

• A strong background in high-speed board design techniques, and understanding of Data Center systems like Servers, JBOGs/JBODs, Networking switches/routers etc. 

• Intermediate level of proficiency in Python for automating system validation and link optimization. 

• Able to step through embedded firmware at the SerDes (SoC) or MCU level for debugging. 

• Firsthand experience with lab equipment including traffic generators, analyzers, and high-speed oscilloscopes. 

Preferred Experience 

• Strong working knowledge of a high speed interface at a physical layer level, associated standards, and debug. Most recent experience with 12G NRZ signaling at a minimum, some experience with 25G NRZ/56G PAM4 preferred. 

• Development, support, and experience with PCIe ICs. 

• Experience in embedded SW debug or development with firmware, drivers, and BIOS using PCIe technology. 

• Working knowledge of software/firmware build environments, gcc/Make and GitHub. 

• Knowledge of simulation/modeling, schematic capture, and PCB layout tools from Cadence, Altium and others etc. 

• Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.