Design Technology Tool Enablement Engineer

Job Details:

Job Description:

The Role and Impact

Join the Design Technology Platform team and contribute to our mission of delivering industry-leading process technologies and cutting-edge products to the market. As an EDA Tools Software Engineer, you will play a pivotal role in designing, developing, testing, and debugging software tools and flows that empower design teams to innovate faster and meet complex manufacturability requirements. This role involves working at the intersection of software development and semiconductor design, enabling Intel's advanced process technologies and fostering innovation. Your efforts will directly impact Intel's ability to maintain technological leadership in the semiconductor industry and bring groundbreaking products to the global market.

Key Responsibilities

• Design, develop, and debug software tools and methodologies for process design and manufacturing.
• Collaborate with process developers, design rule owners, and end users to define technology specifications and requirements and implement optimal solutions.
• Automate workflows to enhance efficiency, accuracy, and deployment across teams.
• Build and execute test cases to validate software tools, ensuring seamless integration with design methodologies.
• Engage with internal partners and external EDA vendors to coordinate tool feature requirements and specifications
• Assess and isolate performance contributors for technology features as part of enablement
• Identify and analyze problems, plans, tasks and solutions
• Cultivate and reinforce appropriate group values, norms and behaviors
• Perform in a dynamic, challenging and sometimes ambiguous environment with drive and creativity

The candidate should also exhibit the following behavioral traits and/or skills:

• Creative, independent and out of the box thinker with strong problem solving skills and analytical ability.
• Attention to details, strong organization skills
• Depth and breadth being able to connect the dots and identify cross-discipline optimal solutions
• Self-motivated, strong leadership skills being able to influence across internal and external ecosystem
• Strong written and verbal communication skills to present complex issues with clarity to drive decisions
• Excellent soft skills to work with cross-functional and cross site teams and influence multiple internal and external stakeholders
• Ability to work in a dynamic and team environment

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or related STEM field with 8+ years, OR
• Ph.D. in Electrical Engineering, Computer Engineering, or related STEM field with 5+ years.
• 3+ years of scripting languages such as Python, Tcl, Perl for automation or testing experience in Unix/Linux platforms and computing environments.
• 3+ years of experience in EDA tools, including Calibre, ICV, or Pegasus, with skills in developing rule decks (e.g., SVRF/TVF, PXL, PVL).
• 5+ years of experience in semiconductor device physics and/or process technology, and design rules and/or translating physical design challenges into algorithmic and software-driven solutions.

Preferred Qualifications

• Familiarity with physical verification techniques, including DRC, LVS, and density/fill modules.
• Exposure to layout and schematic entry tools such as Cadence Virtuoso or Synopsys Custom Designer.
• Proven ability to collaborate across teams and organizations to deliver innovative solutions.
• Strong analytical and problem-solving skills, with experience addressing cross-disciplinary challenges.
• Excellent written and verbal communication skills, with the ability to present complex concepts clearly.
• Demonstrated leadership in driving process improvements or innovation initiatives.

Take the next step in your career by joining Intel's Design Technology Platform team, where your expertise will shape the future of technology innovation and drive meaningful progress in the semiconductor industry.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix, US, California, Santa Clara

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $173,660.00-284,580.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.