Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
As Sr. Physical Design Engineer role, you will be responsible for the end‑to‑end physical implementation of complex ASICs and SoCs, from RTL handoff through tape‑out. This role requires deep expertise in place‑and‑route, timing closure, power integrity, and physical verification, along with the ability to drive block‑ or chip‑level closure independently while collaborating across design, verification, and technology teams.
Responsibilities will include, but are not limited to:
Own full physical design flow from netlist handoff through GDSII, including floorplanning, placement, clock tree synthesis (CTS), routing, and ECO closure.
Drive timing closure (setup/hold) across all modes and corners using industry‑standard STA methodologies.
Perform power analysis and optimization, including IR drop, EM, dynamic/static power, and low‑power intent implementation (UPF/CPF).
Resolve congestion, signal integrity, noise, and DRC/LVS issues to achieve clean tape‑out.
Develop, refine, and apply robust physical design methodologies for advanced technology nodes.
Apply leading EDA tools for P&R, STA, physical verification, and power analysis.
Contribute to automation, scripts, and flow improvements to enhance productivity and quality.
Work closely with RTL, logic design, DFT, CAD, and technology teams to resolve design and implementation challenges.
Provide physical feasibility feedback on early architecture and RTL decisions.
Support post‑silicon debug and correlation when required.
Minimum Qualifications
Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
Strong understanding of digital circuit design, CMOS fundamentals, and timing concepts.
Proven hands‑on experience with:
Floorplanning, P&R, CTS, and timing closure
STA, DRC/LVS, and power integrity analysis
Experience with advanced technology nodes and multi‑corner, multi‑mode design methodologies.
Strong problem‑solving skills and ability to work independently on complex designs.
Preferred Qualifications
Experience at 7nm or below technology nodes.
Familiarity with low‑power design techniques and methodologies.
Experience leading block‑level or chip‑level physical design ownership.
Scripting skills (Tcl, Python, or similar) for flow automation and optimization.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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To learn more about Micron, please visit micron.com/careers
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