Senior Engineer II – Design

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

• Synthesis, LEC, Low power checks, Memory BIST insertion, Constraints validation.
• Collaborate with RTL designers, physical design, and DFT teams to ensure early detection and resolution of issues related to synthesis, constraints, and timing.
• Communicate effectively with all stakeholders across the organization
• Running RTL Lint, CLP, BIST, DFT insertion etc.
• Perform full-chip, Subsystem and block-level STA.
• TCL script development in addition to running/analyzing/debugging designs.
• Hands on with DC/Genus/Fusion Compiler, PrimeTime/Tempus, Formality/Conformal
• Mentor and train team members on early-stage implementation flows, tools, and best practices.
• Experience with either RTL development or Physical Design is also a plus.

Requirements/Qualifications:

Required Qualifications

• Bachelor’s or master’s degree in engineering with 5+ years of experience.
• Should have strong understanding Synthesis methodologies with leading industry standard tools.
• Experience with writing timing constraints for synthesis, STA & PD.
• Perform full-chip and block-level STA using PrimeTime or Tempus.
• Experience with scripting language such as Perl/ Python, TCL.
• Able to work independently with design, DFT and PD team for netlist delivery, timing constraints validation.
• Able to handle ECOs and Logic Equivalence checking (LEC).

Preferred Qualifications

• Familiarity with DFT.
• Familiarity with power estimation with vectors, and UPF (unified power format).
• Familiarity with additional EDA tools.
• Utilize prompt engineering to:
  • Generate EDA scripts
  • Interpret timing reports
  • Assist in ECO generation
  • Use AI-driven tools for report generation, analysis, and knowledge capture.

Travel Time:

0% - 25%

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.