Senior CPU Physical Design Engineer

Job Details:

Job Description:

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The Role:

As a CPU Physical Design Engineer, you will be a vital member of Intel's E-Core/Atom microprocessor design team, shaping the future of high-performance CPUs. This role offers the opportunity to work on cutting-edge technology, solving complex design challenges, and optimizing CPU designs to deliver industry-leading performance-per-watt solutions. Your work will directly contribute to driving innovation, enabling advanced computing platforms, and supporting Intel's mission to enrich the lives of every person on earth.

Key Responsibilities:

• Qualify and validate new PDK versions, standard cell libraries using backend design environment for RTL2GDS (Synthesis & APR) and custom verification flows.
• Conduct verification and signoff processes, including formal equivalence verification, static timing analysis, reliability verification, and physical verification tasks like DRC/LVS, noise analysis, and electro migration checks.
• Manage internal Design Data Management repositories used by the design teams.
• Execute all aspects of the CPU physical design flow, including synthesis, floor planning, place and route, static timing analysis, power analysis, reliability, and noise analysis to maintain stable design environment.
• Collaborate closely with cross-functional teams, including logic, circuit, and design automation teams, to improve current and future CPU microarchitectures.
• Work alongside industry EDA vendors to enhance tool capabilities and methodologies for designing high-speed, low-power CPUs.
• Participate in the development and improvement of physical design methodologies and flow automation processes.
• Develop scripts to automate design implementation stages, verification tasks, and quality analysis.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

Bachelor's degree in Computer Engineering or Electrical Engineering similar discipline with 5+ years of relevant experience, or Master's degree in Computer Engineering or Electrical Engineering or similar discipline with 3+ years of relevant experience.

• 6+ years' experience in physical design and verification tools such as Synopsys Fusion Compiler, Cadence Genus/Innovus, Primetime or similar industry-standard tools.
• 4+ years' experience in performing regression tests and validation of PDK (design kit), standard cell libraries and backend tools.
• 4+ years' hands-on experience with scripting languages such as TCL, Perl, or Python, and source code management.
• 2+ years' experience in design database management using Perforce, Git and other database management tools.

Preferred Qualifications:

• Demonstrated expertise in CAD tools and design env for chip-level physical design verification, electrical rule checking, and static timing analysis for worst-case corners.
• Familiarity with machine learning techniques for design optimization and problem solving and expertise in leveraging co-pilot (VScode) for design analysis, debug, and software development.
• Effective communication skills and a collaborative mindset to work across diverse teams and geographies.
• A continuous learning attitude and strong analytical capabilities to tackle complex design challenges.

 

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

Business group:

Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.