Key Responsibilities:
Collaborate with IC design, systems, FW, and test teams to translate field issues and customer requirements into product improvements and new features.
Review customer schematics and layouts for signal‑integrity and power‑integrity best practices (impedance control, terminations, return paths, via design, reference plane strategy).
Lead board‑level bring‑up and validation using oscilloscopes, protocol analyzers; generate test reports and recommendations.
Provide on‑site or remote debug support for complex customer issues.
Develop and maintain application collateral: reference designs, layout guidelines, design checklists, characterization reports, application notes, training materials.
Participate in trade shows and provide FAE training
Qualifications
Bachelor’s degree or above in Electrical/Electronic Engineering or related field.
Extensive experience (7+ years) in hardware design, applications engineering, or system validation.
Strong understanding of high‑speed SerDes fundamentals: channel loss, reflections, return loss, insertion loss, ISI, jitter, equalization, and clocking.
Demonstrated experience with multi‑Gbps serial links (e.g., Ethernet, PCIe, DP, USB3.x/USB4, proprietary SerDes).
Proficiency with SI/PI tools and simulations (e.g., S‑parameter analysis, eye/jitter simulations) and comfort interpreting simulation and measurement correlation.
Hands‑on experience using lab equipment: high‑bandwidth oscilloscopes, TDR, VNA, BERT, protocol analyzers, logic analyzers, and related tools.
Strong skills in PCB design for high‑speed: layer stack‑up, routing constraints, differential pairs, reference planes, decoupling, and power delivery.
Excellent communication and presentation skills to explain complex technical topics to both expert and non‑expert audiences. ⁽⁵⁾
Ability to work effectively with global, cross‑functional teams (design, systems, test, marketing, field).