SOC Implementation Team is seeking a Physical Design Technical Intern. The successful candidate will be working on the Advanced processors or microcontrollers at NXP. The candidate will be working on the fast paced, and leading-edge advanced node technologies building exciting and complex SoCs.
Responsibilities:
This internship position is within the Implementation Team. The successful candidate will have the opportunities to:
· Learn basics of Place and Route including Floorplanning, Placement, CTS, Route, Extraction, Signal EM etc.
· Learn Static timing analysis and constraint development flow using state of the art industrial PD tools.
· Perform timing closure and signal integrity of a sub-system.
· Learn Power EM/IR flow and methodology.
· Perform Power EM/IR analysis of a subsystem & Benchmarking.
· Support design methodology enhancements with EDA tools evaluations.
Qualifications:
· Working towards BS or MS degree in Computer and/or Electrical Engineering.
· Solid understanding of VLSI system & sub-micron CMOS circuits design
· Good scripting skills in (Python, Tcl, shell, etc)
· Self-motivated team player with good communication skills
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
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