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NVIDIA is seeking phenomenal engineers to improve our verification methodology, so we can validate the world’s largest design efficiently. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. We are now looking for a DFT Engineer in our Taiwan, Taipei/Hsinchu Office!
What you’ll be doing:
Verify our custom IP macros.
Collaborate with Design, Integration and TE teams to determine verification scope, develop strategies, implement test planning, and verify designs at IP level, cluster level, and full chip level
Collaborate with CAD team to optimize & smooth our simulation flow
Generating test patterns and perform silicon bring-up
What we need to see:
Master degree of Electrical Engineering/Computer Engineering/Computer Science
Strong debugging and analytical skills with RTL/Gate-level design tracing(Verdi) and verification simulation tool(VCS).
Familiarity with SOC basic architecture (clock, reset, power rail, IO pad, package)
Understanding of Design for Testing including Scan/ATPG/BIST/JTAG is a plus
Skills of Python/Perl/Tck/C/C++ is a plus
Ways to stand out from the crowd:
Fluent English communication is required