At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. is looking for a motivated Application Engineer I: Digital Verification & Simulation - Xcelium to work with us in Belo Horizonte, Brazil.
As an Application Engineer I, you will be part of System & Verification Group (TFO-SVG) participating in technical engagements and act as a advisor for customers deploying Cadence’s industry-leading Digital Verification & Simulation solutions. You will leverage expertise in RTL-level verification methodologies and tools such as Xcelium, vManager, Verisium and VIPs to solve complex challenges. This role combines technical support and innovation to enable customer success in the semiconductor industry! Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world.
Job Description:
- As an Application Engineer I you will be responsible to provide technical support, helping Cadence customers to effectively deploy our industry leading Verification products.
- Serve as the primary technical contact for strategic accounts, providing advanced support and guidance on verification flows, evaluations, proof-of-concepts, and deployment strategies for Xcelium and complementary tools.
- Design and implement advanced verification methodologies tailored to customer needs.
- Collaborate with R&D to influence product enhancements and resolve complex issues.
- Develop scripts and automation flows using TCL, Python, or similar languages to enhance customer productivity.
- Identify opportunities for process improvement and implement scalable solutions.
Requirements:
- Complete Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related field.
- Expertise in RTL verification (Verilog/VHDL) and methodologies such as UVM.
- Experience in functional verification, simulation, or related EDA domains.
- Strong analytical and problem-solving skills
- Proven ability to manage complex technical engagements and deliver innovative solutions.
- Excellent communication skills in Portuguese and English.
Nice to have:
- Experience with Unix and C/C++
- Knowledge of design fundamentals such as architecture, micro-architecture, HDL synthesis, and timing
- Verification skills including UVM testbench architecture, development and debugging, System Verilog, and SVA
- Familiarity with embedded software development and HW/SW co-design and co-verification
- Proficiency in scripting languages (Perl, Python, TCL, Bash, etc.)
Additional Job Details:
- Employment category: CLT
- Employment term: 40 hours/week.
- Competitive benefits.
- Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.
About Cadence Design Systems:
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com.
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